XITC launch PCIe4.0 SSD control chip based on RISC-V architecture

On July 28, the annual Flash Memory World 2022 (FMW2022) was held, and Xinsheng Intelligence, as a leading solid-state storage controller chip and solution provider, was invited to attend the industry's top summit and deliver a speech. At the meeting, XITC officially released the PCIe4.0 controller chip based on RISC-V architecture, fully opening a new era of fully autonomous PCIe controllers.

In the same period, XITC held a sub-forum of "Core Power, Build domestic storage ecology", and joined hands with the upstream and downstream of the industrial chain, taking RISC-V architecture as a starting point to inject vitality into the localization of new infrastructure construction.　

　　
Chip, is the cornerstone of new infrastructure, which is equipped with microprocessor (CPU) SoC chip in which the proportion has reached more than 70%, there is no doubt that with the acceleration of the pace of new infrastructure, CPU architecture for the chip industry increasing impact. Ni Guangnan, academician of the Chinese Academy of Engineering, said at the sub-forum held by XITC that it is expected that for a long time in the future, the global mainstream CPU architecture will still be monopolized by x86 and ARM architectures, and there are greater security risks and supply risks. "Therefore, we must firmly grasp the autonomy of the development of mainstream cpus in our own hands, so that the chip industry is completely free from the situation of being controlled by others." "He stressed.

RISC-V, an open instruction set architecture, provides a good opportunity to realize the domestic autonomy of the processor core. In the field of storage controller, XITC dares to be the first, launched the PCIe4.0 controller chip based on RISC-V architecture, and named it "Walker", demonstrating XITC's confidence and determination to persevere and step forward to achieve the benign development of solid state storage.

At the beginning of the design of "Walker", XITC proposed the "three high and three full" design goals: high performance, high safety, high autonomy; The whole industry, the whole scene, the whole autonomy.

"Walker"adopts RISC-V six-core architecture system, front-end with PCIe4.0×4 high-speed interface, back-end with 8-channel flash memory interface, support NVMe1.4 transmission protocol, sequential read and write speed up to 7000/6000MBps, 4K random read and write up to 1000k/900kIOPS, the industry leading performance. In the development process of solid state drive, storage particles have developed from the early SLC, MLC, TLC to today's QLC, "Walker" fully adapt to 3D TLC and 3D QLC particles, can support a maximum of 16TB capacity, flexible adaptation to diverse scenarios.

"Walker" built-in core XITC's NANDXtra^® and NANDSafe™, while ensuring high performance, high stability, but also greatly extend the service life of solid state drive. It is worth mentioning that "Walker" is the first chip with additional code security, which is designed according to the commercial password secondary standard specification, greatly improving the security of data storage.

As a leading solid-state storage controller chip and solution provider, XITC has been committed to the design and development of independent cores since its establishment in 2018. Up to now, XITC has launched a number of storage controller chips, security encryption chips, solid state storage products and data security solutions, products covering data center, edge center, industrial control, consumer terminals and vehicle electronics and other industries, widely used in the party and government, finance, electric power, rail transit, safe city and other fields.

In the future, XITC will continue to deepen the solid-state storage market, actively launch solid-state storage products fully equipped with its own core, provide users with high-quality secure storage experience, and become the best partner for the era of digital economy.